Description
The undergraduate-level course explores the design of combinational or sequential logical circuit. The course starts with understanding the basic concept of logic circuit, the theory of Boolean algebra and physical implementation techniques of logical circuit. Then, the course explores the design of combinational logic including optimization techniques. Also, the course includes the study of storage logic circuits such as latch, flipflops and registers. Finally, the course explores the design of synchronized or asynchronized sequential logic.
Instructor
Kyungbaek Kim
Office : Engineering Building #6, 715
Tel : +82-62-530-3438
Email : kyungbaekkim@jnu.ac.kr
Office Hours : Thur 10:00 ~ 10:45
Time and Location
- Group 1 : Tue, Thur 15:00 ~ 16:15, Engineering Building #6, 105
- Group 2 : Tue, Thur 16:30 ~ 17:45, Engineering Building #6, 102
Main Text
- Fundamentals of digital logic with VHDL design, 3rd edition, Brown and Vranesic
Reference Text
- Fundamentals of Logic Design, 6th edition, C. H. Roth Jr
- Logic and Computer Design Fundamentals, 5th edition, Morris Mano, et al
- 디지털논리회로, 김종현
Grading Policy
- Attendance : 10%
- Homework and Quiz : 30%
- Around four to five times of homeworks.
- Around two to three times of pop-up quiz.
- Midterm Exam : 30%
- Final Exam : 30%
Lecture Notes
- 0.Syllabus
- 1.Design Concept
- 2.Introduction to Logic Circuits
- 3.Optimized Implementation of Logic Functions
- 4.Espresso Exercise
- 5.Number Representation and Arithmetic Circuits
- 6.Quartus2 exercise
- 7.Combinational Circuit Building Blocks
- 8.Flip-flops Registers Counters and a Simple Processor
- 9.Synchronous Sequential Circuites
Lecture notes are accessible through the eClass of JNU portal.
Homeworks and Exercises
- Homework 01
- Homework 02
- Homework 03
- Homework 04
- Homework 05
- Homework 06
- Homework 07