Description
The undergraduate-level course explores the design of combinational or sequential logical circuit. The course starts with understanding the basic concept of logic circuit, the theory of Boolean algebra and physical implementation techniques of logical circuit. Then, the course explores the design of combinational logic including optimization techniques. Also, the course includes the study of storage logic circuits such as latch, flipflops and registers. Finally, the course explores the design of synchronized or asynchronized sequential logic.
Instructor
Kyungbaek Kim
Office : Engineering Building #6, 715
Tel : +82-62-530-3438
Email : kyungbaekkim@chonnam.ac.kr
Office Hours : Tue 2pm ~ 3pm
Time and Location
Mon 11am-12pm, Wed 11am-12pm, Fri 11am-12pm, Engineering Building #6, 102
Main Text
- Fundamentals of digital logic with VHDL design, 3rd edition, Brown and Vranesic
Reference Text
- Fundamentals of Logic Design, 6th edition, C. H. Roth Jr
Grading Policy
- Attendance : 10%
- Homework and Quiz : 30%
- Around four to five times of homeworks.
- Around two to three times of pop-up quiz.
- Midterm Exam : 25%
- Final Exam : 35%
Lecture Notes
- 1.Design Concept
- 2.Intoruction to Logic Circuits
- 3.Implementation Technology
- 4.Optimized Implementation of Logic Functions
- 5.Number Representation and Arithmetic Circuits
- 6.Combinational Circuit Building Block
- 7.Flip-flops Registers Counters and a Simple Processor
- 8.Synchronous Sequential Circuits
Lecture notes are accessible through the eClass of JNU portal.
Homeworks, Quiz, Midterm/Final Exam
All of the materials related to homeworks, quiz, midterm exam and final exam, including solutions, are accessible through the eClass of JNU portal.